1. Technical Field of the Invention
The present invention relates to a process for manufacturing integrated resistive elements with self-aligned silicidation protection.
2. Description of Related Art
As is known, numerous processes for the fabrication of integrated electronic devices comprise steps of so-called self-aligned silicidation or salicidation, the main purpose of which is to increase the conductivity of some structures, such as polysilicon connection lines or active areas in which junctions are made. In brief, silicidation is generally carried out after the usual steps of ion implantation and diffusion, which are normally employed for fabricating integrated semiconductor circuits. With reference for greater clarity to FIGS. 1 to 3, a semiconductor wafer 1, for example, made of monocrystalline silicon, comprises conductive active areas 2, isolated by shallow-trench isolation (STI) structures 3 or, alternatively, by isolation structures obtained with local-oxidation (LOCOS) techniques. In practice, the isolation structures 3 comprise trenches of predetermined depth filled with silicon dioxide. In the active areas 2, elements are previously made (here not illustrated in detail), the conductivity of which is to be optimized. Initially, a conductive layer 5 of a metal such as titanium or cobalt is deposited upon the wafer 1, so as to cover completely both the active areas 2 and the isolation structures 3. The wafer 1 is then heated. In this step, the metal reacts with the underlying silicon, forming titanium-silicide or cobalt-silicide regions 6, whereas it does not react with the silicon oxide of the isolation structures 3. The metal of the conductive layer 5′ is then selectively etched and removed, whilst the metal-silicide regions 6 remain intact. In practice, therefore, the exposed conductive portions of monocrystalline-silicon or polycrystalline-silicon remain covered by the regions 6. Silicidation is clearly advantageous, because the silicides thus obtained typically have resistivity values of an order of magnitude smaller than even heavily doped silicon and polysilicon. The process is moreover self-aligned, since the formation of the regions 6 is determined by the surface conformation of the wafer 1, and hence, for the definition of silicidized structures, the use of masks is not required.
There are, however, electrical components which are not compatible with silicidation and thus require special solutions to be integrated in the active areas. In particular, resistors with high specific resistance are normally made of appropriately doped silicon and must therefore be altogether protected during the silicidation step; otherwise, in fact, they would be substantially short-circuited and would loose their function.
Known processes for fabricating resistors in active areas, in which a silicidation step is carried out, envisage the use of protective structures which cover the resistors themselves, preventing contact between the deposited metal and uncovered silicon areas. The addition of a structure for protection from silicidation, which is typically obtained via deposition of dielectric materials, such as silicon dioxide, silicon oxynitride or silicon nitride, is, however, disadvantageous because it increases both the complexity and the overall cost of the process. In fact, the fabrication of a protective structure involves steps of deposition, definition by a photolithographic process to form a mask, etching, and, after silicidation, possible removal of the dielectric from the semiconductor wafer. In practice, all these steps are exclusively dedicated to the protection from silicidation and cannot be shared for fabrication of other integrated components.
There is accordingly a need to provide a process for the fabrication of integrated resistors which is free from the drawbacks described above.